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ControllingDual3-PhaseInvertersforMotors(ACIandPMSM)
Example3-4.CodeSnippetforConfigurationinFigure3-9
//=====================================================================
//Configuration
//=====================================================================
//InitializationTime
//========================//EPWMModule1config
EPwm1Regs.TBPRD=800;//Period=1600TBCLKcounts
EPwm1Regs.TBPHS=0;//SetPhaseregistertozero
EPwm1Regs.TBCTL.bit.CTRMODE=TB_COUNT_UPDOWN;//Symmetricalmode
EPwm1Regs.TBCTL.bit.PHSEN=TB_DISABLE;//Mastermodule
EPwm1Regs.TBCTL.bit.PRDLD=TB_SHADOW;
EPwm1Regs.TBCTL.bit.SYNCOSEL=TB_CTR_ZERO;//Syncdown-streammodule
EPwm1Regs.CMPCTL.bit.SHDWAMODE=CC_SHADOW;
EPwm1Regs.CMPCTL.bit.SHDWBMODE=CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADAMODE=CC_CTR_ZERO;//loadonCTR=Zero
EPwm1Regs.CMPCTL.bit.LOADBMODE=CC_CTR_ZERO;//loadonCTR=Zero
EPwm1Regs.AQCTLA.bit.CAU=AQ_SET;//setactionsforEPWM1A
EPwm1Regs.AQCTLA.bit.CAD=AQ_CLEAR;
EPwm1Regs.DBCTL.bit.MODE=DB_FULL_ENABLE;//enableDead-bandmodule
EPwm1Regs.DBCTL.bit.POLSEL=DB_ACTV_HIC;//ActiveHicomplementary
EPwm1Regs.DBFED=50;//FED=50TBCLKs
EPwm1Regs.DBRED=50;//RED=50TBCLKs
//EPWMModule2config
EPwm2Regs.TBPRD=800;//Period=1600TBCLKcounts
EPwm2Regs.TBPHS=0;//SetPhaseregistertozero
EPwm2Regs.TBCTL.bit.CTRMODE=TB_COUNT_UPDOWN;//Symmetricalmode
EPwm2Regs.TBCTL.bit.PHSEN=TB_ENABLE;//Slavemodule
EPwm2Regs.TBCTL.bit.PRDLD=TB_SHADOW;
EPwm2Regs.TBCTL.bit.SYNCOSEL=TB_SYNC_IN;//syncflow-through
EPwm2Regs.CMPCTL.bit.SHDWAMODE=CC_SHADOW;
EPwm2Regs.CMPCTL.bit.SHDWBMODE=CC_SHADOW;
EPwm2Regs.CMPCTL.bit.LOADAMODE=CC_CTR_ZERO;//loadonCTR=Zero
EPwm2Regs.CMPCTL.bit.LOADBMODE=CC_CTR_ZERO;//loadonCTR=Zero
EPwm2Regs.AQCTLA.bit.CAU=AQ_SET;//setactionsforEPWM2A
EPwm2Regs.AQCTLA.bit.CAD=AQ_CLEAR;
EPwm2Regs.DBCTL.bit.MODE=DB_FULL_ENABLE;//enableDead-bandmodule
EPwm2Regs.DBCTL.bit.POLSEL=DB_ACTV_HIC;//ActiveHicomplementary
EPwm2Regs.DBFED=50;//FED=50TBCLKs
EPwm2Regs.DBRED=50;//RED=50TBCLKs
//EPWMModule3config
EPwm3Regs.TBPRD=800;//Period=1600TBCLKcounts
EPwm3Regs.TBPHS=0;//SetPhaseregistertozero
EPwm3Regs.TBCTL.bit.CTRMODE=TB_COUNT_UPDOWN;//Symmetricalmode
EPwm3Regs.TBCTL.bit.PHSEN=TB_ENABLE;//Slavemodule
EPwm3Regs.TBCTL.bit.PRDLD=TB_SHADOW;
EPwm3Regs.TBCTL.bit.SYNCOSEL=TB_SYNC_IN;//syncflow-through
EPwm3Regs.CMPCTL.bit.SHDWAMODE=CC_SHADOW;
EPwm3Regs.CMPCTL.bit.SHDWBMODE=CC_SHADOW;
EPwm3Regs.CMPCTL.bit.LOADAMODE=CC_CTR_ZERO;//loadonCTR=Zero
EPwm3Regs.CMPCTL.bit.LOADBMODE=CC_CTR_ZERO;//loadonCTR=Zero
EPwm3Regs.AQCTLA.bit.CAU=AQ_SET;//setactionsforEPWM3A
EPwm3Regs.AQCTLA.bit.CAD=AQ_CLEAR;
EPwm3Regs.DBCTL.bit.MODE=DB_FULL_ENABLE;//enableDead-bandmodule
EPwm3Regs.DBCTL.bit.POLSEL=DB_ACTV_HIC;//ActiveHicomplementary
EPwm3Regs.DBFED=50;//FED=50TBCLKs
EPwm3Regs.DBRED=50;//RED=50TBCLKs
//RunTime(Note:Exampleexecutionofonerun-timeinstant)
//=========================================================
EPwm1Regs.CMPA.half.CMPA=500;//adjustdutyforoutputEPWM1A
EPwm2Regs.CMPA.half.CMPA=600;//adjustdutyforoutputEPWM2A
EPwm3Regs.CMPA.half.CMPA=700;//adjustdutyforoutputEPWM3A
SPRU791D–November2004–RevisedOctober2007ApplicationstoPowerTopologies83
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