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Action-Qualifier(AQ)Submodule
Figure2-25.Up-Down-Count,DualEdgeSymmetricWaveform,WithIndependentModulationon
EPWMxAandEPWMxB—Complementary
APWMperiod=2×TBPRD×T
TBCLK
BDutymodulationforEPWMxAissetbyCMPA,andisactivelow,i.e.,lowtimedutyproportionaltoCMPA
CDutymodulationforEPWMxBissetbyCMPBandisactivehigh,i.e.,hightimedutyproportionaltoCMPB
DOutputsEPWMxcandriveupper/lower(complementary)powerswitches
EDead-band=CMPB-CMPA(fullyprogrammableedgeplacementbysoftware).Notethedead-bandmoduleisalso
availableifthemoreclassicaledgedelaymethodisrequired.
Example2-6containsacodesampleshowinginitializationandruntimeforthewaveformsinFigure2-25.
UsethecodeinExample2-1todefinetheheaders.
Example2-6.CodeSampleforFigure2-25
//InitializationTime
//========================
EPwm1Regs.TBPRD=600;//Period=2×600TBCLKcounts
EPwm1Regs.CMPA.half.CMPA=350;//CompareA=350TBCLKcounts
EPwm1Regs.CMPB=400;//CompareB=400TBCLKcounts
EPwm1Regs.TBPHS=0;//SetPhaseregistertozero
EPwm1Regs.TBCNT=0;//clearTBcounter
EPwm1Regs.TBCTL.bit.CTRMODE=TB_UPDOWN;//Symmetric
EPwm1Regs.TBCTL.bit.PHSEN=TB_DISABLE;//Phaseloadingdisabled
EPwm1Regs.TBCTL.bit.PRDLD=TB_SHADOW;
EPwm1Regs.TBCTL.bit.SYNCOSEL=TB_SYNC_DISABLE;
EPwm1Regs.TBCTL.bit.HSPCLKDIV=TB_DIV1;//TBCLK=SYSCLKOUT
EPwm1Regs.TBCTL.bit.CLKDIV=TB_DIV1;
EPwm1Regs.CMPCTL.bit.SHDWAMODE=CC_SHADOW;
EPwm1Regs.CMPCTL.bit.SHDWBMODE=CC_SHADOW;
EPwm1Regs.CMPCTL.bit.LOADAMODE=CC_CTR_ZERO;//loadonCTR=Zero
EPwm1Regs.CMPCTL.bit.LOADBMODE=CC_CTR_ZERO;//loadonCTR=Zero
EPwm1Regs.AQCTLA.bit.CAU=AQ_SET;
EPwm1Regs.AQCTLA.bit.CAD=AQ_CLEAR;
EPwm1Regs.AQCTLB.bit.CBU=AQ_CLEAR;
EPwm1Regs.AQCTLB.bit.CBD=AQ_SET;
//RunTime
//========================
EPwm1Regs.CMPA.half.CMPA=Duty1A;//adjustdutyforoutputEPWM1A
EPwm1Regs.CMPB=Duty1B;//adjustdutyforoutputEPWM1B
48ePWMSubmodulesSPRU791D–November2004–RevisedOctober2007
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