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VXI Technology, Inc.
SM8000 Series Programming 45
Trace RAM Control Register – Read and Write
ADDR
Plug-In LA+0x3A
D15-D10 Modules Installed
D15 is for module 5 ... D10 is for module 0. Set to 0 if the module
is installed or set to a 1 if not installed. These bits are set to 0 at
power on. By setting a 1, the SMIP II Interface PCB will generate
DTACK* for any read or write cycles to the memory space of the
uninstalled plug-in modules.
D9-D4
Modules used in
trace mode
D9 is for module 5 ... D4 is for module 0. Set to 1 if the module is
used in trace mode, set to 0 if not in trace mode.
D3-D2 Unused
Data written to these bits have no effect. The value written is read
back.
D1 LOOP ENABLE
1 = enabled
0 = disabled
If enabled, the trace resumes at the start of active RAM and
continues from there. If disabled, the trace stops at the end of
active RAM and clears the TRACE ENABLE bit.
D0 TRACE ENABLE
1 = enabled
0 = disabled
If the LOOP ENABLE bit is set and the end of active trace RAM
is reached, this bit will not be reset.
Busy Trigger Control Register – Read and Write
ADDR
Plug-In LA+0x3C
D15-D8 TTLTRIG Select
Sets the TTLTRIG Line or Lines, which are configured as outputs,
and will toggle at the de-assertion of a Board Busy condition sent
by the plug-in modules. D15 corresponds to TTLTRIG7, D14 to
TTLTRIG6, … and D8 to TTLTRIG0. Setting a bit to a 1, enables
the trigger line, setting a bit to a 0, disables the corresponding line.
All bits are set to 0's when either a soft or a hard reset is received
by the module.
D7-D6 Unused
Data written to these bits have no effect. The value written is read
back.
D5-D0
Busy Trigger
Enable
Enables the Board Busy signals received from the plug-in modules
to generate a trigger condition on the TTL Trigger Bus. D5
corresponds to Board Busy Module 5, D4 to Board Busy Module
4, … and D0 to Board Busy Module 0. Setting a bit to a 1, enables
the generation of a Trigger condition, setting a bit to a 0, disables
the corresponding line. All bits are set to 0's when either a soft or a
hard reset is received by the module.
Software can be written to enable the last board updated to
generate the TTLTrigger condition, alerting any other instruments
that the plug0in modules' relays have settled. Alternatively, all of
the plug-in modules may be enabled to generate the TTLTrigger
condition.