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For current information contact Analog Devices at (781) 461-3881
ADSP-2192 October 2000
This information applies to a product under development. Its characteristics and specifications are subject to change with-
out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.
34 REV. PrA
Instruction Set Description
The ADSP-2192 assembly language instruction set has an
algebraic syntax that was designed for ease of coding and
readability. The assembly language, which takes full advan-
tage of the processor’s unique architecture, offers the
following benefits:
• ADSP-219x assembly language syntax is a superset of
and source code-compatible (except for two data regis-
ters and DAG base address registers) with ADSP-218x
family syntax. You may need to restructure your 218x
programs, however, to accommodate the ADSP-2192’s
unified memory space and to conform to its interrupt
vector map.
• The algebraic syntax eliminates the need to remember
cryptic assembler mnemonics. For example, a typical
arithmetic add instruction, such as AR = AX0 + AY0,
resembles a simple equation.
• Every instruction, except two, assembles into a single,
24-bit word that can execute in a single instruction
cycle. The exceptions are two dual-word instructions,
one of which writes 16- or 24-bit immediate data to
memory, and the other of which jumps/calls to other
pages in memory.
• Multi-function instructions allow parallel execution of
an arithmetic, MAC, or shift instruction with up to two
fetches or one write to processor memory space during
a single instruction cycle.
• Supports a wider variety of conditional and uncondi-
tional jumps and calls and a larger set of conditions on
which to base execution of conditional instructions.
Development Tools
The ADSP-2192 is supported with a complete set of
VisualDSP++™ software and hardware development tools,
which include Analog Devices VisualDSP++ integrated
development environment, evaluation kit, and emulators.
The JTAG emulator hardware used for other ADSP-219x
DSPs, also fully emulates the ADSP-2192.
Both the ADSP-219x hardware development tools family
and the VisualDSP++ integrated project management and
debugging environment support the ADSP-2192. The
VisualDSP++ project management environment enables
you to develop and debug an application.
The ADSP-219x software development environment,
VisualDSP++, includes an easy-to-use assembler that is
based on an algebraic syntax; an archiver (librarian/library
builder); a linker; a loader; a cycle-accurate, instruc-
tion-level simulator; a C/C++ compiler; and a C/C++
run-time library that includes DSP and mathematical func-
tions. Two key points for these tools are:
• Compiled ADSP-219x C/C++ code efficiency—The
compiler has been developed for efficient translation of
C/C++ code to ADSP-219x assembly. The DSP has
architectural features that improve the efficiency of
compiled C/C++ code.
• ADSP-218x family code compatibility—The assembler
has legacy features to ease the conversion of existing
ADSP-218x applications to the ADSP-219x.
Debugging both C/C++ and assembly programs with the
VisualDSP++ debugger, you can:
• View mixed C/C++ and assembly code (interleaved
source and object information)
• Insert break points
• Set conditional breakpoints on registers, memory, and
stacks
• Trace instruction execution
• Profile program execution
• Fill and dump memory
• Source level debugging
• Create custom debugger windows
The VisualDSP++ IDE lets you define and manage DSP
software development. Its dialog boxes and property pages
enable you to configure and manage all of the ADSP-219x
development tools, including the syntax highlighting in the
VisualDSP++ editor. This capability lets you:
• Control how the development tools process inputs and
generate outputs.
• Maintain a one-to-one correspondence with the tool’s
command line switches.
Analog Devices DSP emulators use the IEEE 1149.1 JTAG
test access port of the ADSP-2192 processor to monitor
and control the target board processor during emulation.
The emulator provides full-speed emulation, allowing
inspection and modification of memory, registers, and pro-
cessor stacks. Non-intrusive in-circuit emulation is assured
by the use of the processor’s JTAG interface; the emulator
does not affect target system loading or timing.
Note that the ADSP-2192 JTAG port does not support
boundary scan.
In addition to the software and hardware development tools
available from Analog Devices, third parties provide a wide
range of tools supporting the ADSP-219x processor family.
Hardware tools include ADSP-219x PC plug-in cards.
Third party software tools include DSP libraries, real-time
operating systems, and block diagram design tools.
The emulator probe requires the ADSP-2192’s CLKIN,
TMS, TCK, TRST
, TDI, TDO, EMU, and GND signals
be made accessible on the target system via a 14-pin con-