CyberResearch UMDAS 0802DA Personal Computer User Manual


 
External trigger
Table 4-10. Digital trigger specifications
Parameter Conditions Specification
Trigger source (Note 7) External digital TRIG_IN
Trigger mode
Software
selectable
Edge sensitive: user configurable for CMOS compatible rising or
falling edge.
Trigger latency
10 µs max
Trigger pulse width
1 µs min
Input high voltage
4.0 V min, 5.5 V absolute max
Input low voltage
1.0 V max, –0.5 V absolute min
Input leakage current
±1.0 µA
Note 7: TRIG_IN is a Schmitt trigger input protected with a 1.5 kilohm (k) series resistor.
External clock input/output
Table 4-11. External clock I/O specifications
Parameter Conditions Specification
Pin name
SYNC
Pin type
Bidirectional
Output (default) Outputs internal A/D pacer clock. Software selectable direction
Input Receives A/D pacer clock from external source.
Input clock rate
48 KHz, maximum
Input mode 1 µs min Clock pulse width
Output mode 5 µs min
Input leakage current Input mode ±1.0 µA
Input high voltage
4.0 V min, 5.5 V absolute max
Input low voltage
1.0 V max, –0.5 V absolute min
IOH = –2.5 mA 3.3 V min Output high voltage (Note 8)
No load 3.8 V min
IOL = 2.5 mA 1.1 V max Output low voltage (Note 8)
No load 0.6 V max
Note 8: SYNC is a Schmitt trigger input and is over-current protected with a 200 series resistor.
Counter section
Table 4-12. Counter specifications
Pin name
(
Note 9
)
CTR
Counter t
yp
e Event counte
r
Number of channels 1
In
p
ut t
yp
e TTL
,
risin
g
ed
g
e tri
gg
ere
d
In
p
ut source CTR screw terminal
Resolution 32 bits
Schmidt tri
gg
er h
y
steresis 20 mV to 100 m
V
In
p
ut leaka
g
e current ±1
µ
A
Maximum input frequency 1 MHz
Hi
g
h
p
ulse width 500 ns min
L
ow
p
ulse width 500 ns min
In
p
ut hi
g
h volta
g
e 4.0 V min
,
5.5 V absolute max
In
p
ut low volta
g
e 1.0 V max
,
0.5 V absolute min
Note 9: CTR is a Schmitt trigger input protected with a 1.5K series resistor.
4-4
UMDAS 0802DA User's Guide Specifications