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Document #: 38-06070 Rev. *H Page 16 of 32
JTAG Timing
Parameter Description
167/133/100
Unit
Min Max
f
JTAG
Maximum JTAG TAP Controller Frequency 10 MHz
t
TCYC
TCK Clock Cycle Time 100 ns
t
TH
TCK Clock HIGH Time 40 ns
t
TL
TCK Clock LOW Time 40 ns
t
TMSS
TMS Setup to TCK Clock Rise 10 ns
t
TMSH
TMS Hold After TCK Clock Rise 10 ns
t
TDIS
TDI Setup to TCK Clock Rise 10 ns
t
TDIH
TDI Hold After TCK Clock Rise 10 ns
t
TDOV
TCK Clock LOW to TDO Valid 30 ns
t
TDOX
TCK Clock LOW to TDO Invalid 0 ns
Figure 7. JTAG Switching Waveform
Test Clock
Test Mode Select
TCK
TMS
Test Data-In
TDI
Test Data-Out
TDO
t
TCYC
t
TMSH
t
TL
t
TH
t
TMSS
t
TDIS
t
TDIH
t
TDOX
t
TDOV
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