CY7C68053
Document # 001-06120 Rev *F Page 22 of 39
C9 1 Reserved
CA 1 RCAP2L Capture for Timer 2, auto-
reload, up-counter
D7 D6 D5 D4 D3 D2 D1 D0 00000000 RW
CB 1 RCAP2H Capture for Timer 2, auto-
reload, up-counter
D7 D6 D5 D4 D3 D2 D1 D0 00000000 RW
CC 1 TL2 Timer 2 reload L D7 D6 D5 D4 D3 D2 D1 D0 00000000 RW
CD 1 TH2 Timer 2 reload H D15 D14 D13 D12 D11 D10 D9 D8 00000000 RW
CE 2 Reserved
D0 1 PSW Program Status Word (bit
addressable)
CY AC F0 RS1 RS0 OV F1 P 00000000 RW
D1 7 Reserved
D8 1 EICON
[12]
External Interrupt Control SMOD1 1 ERESI RESI INT6 0 0 0 01000000 RW
D9 7 Reserved
E0 1 ACC Accumulator (bit address-
able)
D7 D6 D5 D4 D3 D2 D1 D0 00000000 RW
E1 7 Reserved
E8 1 EIE
[12]
External Interrupt En-
able(s)
1 1 1 EX6 EX5 EX4 EI²C EUSB 11100000 RW
E9 7 Reserved
F0 1 B B (bit addressable) D7 D6 D5 D4 D3 D2 D1 D0 00000000 RW
F1 7 Reserved
F8 1 EIP
[12]
External Interrupt Priority
Control
1 1 1 PX6 PX5 PX4 PI²C PUSB 11100000 RW
F9 7 Reserved
Table 5-1. FX2LP18 Register Summary (continued)
Hex Size Name Description b7 b6 b5 b4 b3 b2 b1 b0 Default Access
Ledgend
R = all bits read-only
W = all bits write-only
r = read-only bit
w = write-only bit
b = both read/write bit
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