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CY7C68053
Document # 001-06120 Rev *F Page 32 of 39
9.11 Slave FIFO Synchronous Address
9.12 Slave FIFO Asynchronous Address
Table 9-14. Slave FIFO Synchronous Address Parameters
[10]
Parameter Description Min. Max. Unit
t
IFCLK
Interface Clock Period 20.83 200 ns
t
SFA
FIFOADR[1:0] to Clock Set-up Time 25 ns
t
FAH
Clock to FIFOADR[1:0] Hold Time 10 ns
Slave FIFO Asynchronous Address Parameters
[20]
Parameter Description Min. Max. Unit
t
SFA
FIFOADR[1:0] to SLRD/SLWR/PKTEND Set-up Time 10 ns
t
FAH
RD/WR/PKTEND to FIFOADR[1:0] Hold Time 10 ns
IFCLK
SLCS/FIFOADR [1:0]
t
SFA
t
FAH
Figure 9-11. Slave FIFO Synchronous Address Timing Diagram
[17]
SLRD/SLWR/PKTEND
SLCS/FIFOADR [1:0]
t
SFA
t
FAH
Figure 9-12. Slave FIFO Asynchronous Address Timing Diagram
[17]
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