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CY7C68053
Document # 001-06120 Rev *F Page 29 of 39
9.6 Slave FIFO Asynchronous Write
9.7 Slave FIFO Synchronous Packet End Strobe
DATA
t
SFD
t
FDH
FLAGS
t
XFD
SLWR/SLCS#
t
WRpwh
t
WRpwl
Figure 9-5. Slave FIFO Asynchronous Write Timing Diagram
[17]
Table 9-8. Slave FIFO Asynchronous Write Parameters with Internally Sourced IFCLK
[20]
Parameter Description Min. Max. Unit
t
WRpwl
SLWR Pulse LOW 50 ns
t
WRpwh
SLWR Pulse HIGH 70 ns
t
SFD
SLWR to FIFO DATA Set-up Time 10 ns
t
FDH
FIFO DATA to SLWR Hold Time 10 ns
t
XFD
SLWR to FLAGS Output Propagation Delay 70 ns
FLAGS
t
XFLG
IFCLK
PKTEND
t
SPE
t
PEH
Figure 9-6. Slave FIFO Synchronous Packet End Strobe Timing Diagram
[17]
Table 9-9. Slave FIFO Synchronous Packet End Strobe Parameters with Internally Sourced IFCLK
[10]
Parameter Description Min. Max. Unit
t
IFCLK
IFCLK Period 20.83 ns
t
SPE
PKTEND to Clock Set-up Time 14.6 ns
t
PEH
Clock to PKTEND Hold Time 0 ns
t
XFLG
Clock to FLAGS Output Propagation Delay 9.5 ns
Table 9-10. Slave FIFO Synchronous Packet End Strobe Parameters with Externally Sourced IFCLK
[10]
Parameter Description Min. Max. Unit
t
IFCLK
IFCLK Period 20.83 200 ns
t
SPE
PKTEND to Clock Set-up Time 8.6 ns
t
PEH
Clock to PKTEND Hold Time 3.04 ns
t
XFLG
Clock to FLAGS Output Propagation Delay 13.5 ns
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