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PowerEdge R210 II Technical Guide
8.16 System Management Bus (SMBus 2.0)
The chipset contains an SMBus Host interface that allows the processor to communicate with SMBus
slaves. This interface is compatible with most I2C devices. Special I2C commands are implemented.
The chipset‘s SMBus host controller provides a mechanism for the processor to initiate
communications with SMBus peripherals (slaves). Also, the chipset supports slave functionality,
including the Host Notify protocol. Hence, the host controller supports eight command protocols of
the SMBus interface.
The chipset‘s SMBus also implements hardware-based Packet Error Checking for data robustness and
the Address Resolution Protocol (ARP) to dynamically provide address to all SMBus devices.
8.17 Intel Virtualization Technology for Directed I/O
The chipset provides hardware support for implementation of Intel Virtualization Technology with
Directed I/O (Intel VT-d). Intel VT-d Technology consists of technology components that support the
virtualization of platforms based on Intel Architecture Processors. Intel VT-d Technology enables
multiple operating systems and applications to run in independent partitions. A partition behaves like
a virtual machine (VM) and provides isolation and protection across partitions. Each partition is
allocated its own subset of host physical memory.