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EM78612
Universal Serial Bus Microcontroller
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• Product Specification(V1.0) 03.22.2006
(This specification is subject to change without further notice)
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7.6.2 Dual Clock Mode
The EM78612 has one internal oscillator for power saving application. Clearing the Bit
IOCE [7] will enable the low frequency oscillator. At the same time, the external
oscillator will be turned off. Then the MCU will run under very low frequency to
conserve power. Four types of frequency are available for selection in setting Bits IOCA
[6, 7].
The USB Host Resume Interrupt can only be used in this mode. If this interrupt is
enabled, the MCU will be interrupted when the USB Host Resume signal is detected on
USB Bus.
7.7 Interrupt
The EM78612 has two interrupt vectors, one is in 0x0001, and the other is in 0x000A.
When an interrupt occurs while the MCU is running, it will jump to the interrupt vector
(0x0001 or 0x000A) and execute the instructions sequentially from interrupt vector. RF
is the interrupt status register that records the interrupt status in the relative flags/bits.
The interrupt condition could be one of the following:
1. TCC Overflow When the Timer Clock / Counter Register (R1) overflows, the
status flag RF[0] will be set to 1. Its interrupt vector is 0X0001.
2. EP0 Interrupt When the UDC successfully received a setup transaction
from host to EndPoint0, the status flag RF[1] will be set to 1. Its interrupt vector is
0X000A.
3. USB Suspend When UDC detects a USB Suspend signal on USB bus, the
status flag RF[2] will be set to 1. Its interrupt vector is 0X000A.
4. USB Reset When the UDC detects a USB Reset signal on USB bus,
the status flag RF[3] will be set to 1. Its interrupt vector is 0X000A.
5. USB Host Resume When UDC detects that the USB bus has left the Suspend
condition, the status flag RF[4] will be set to 1. Its interrupt vector is 0X000A.
6. Port 5 State Change When the input signals in Port 5 changes, the status flag
RF[5] will be set to 1. Its interrupt vector is 0X0001.
IOCF is an interrupt mask register which can be set individually bit by bit. While their
respective bit is written to 0, the hardware interrupt will inhibit, that is, the EM78612 will
not jump to the interrupt vector to execute instructions. But the interrupt status flags still
records the conditions no matter whether the interrupt is masked or not. The interrupt