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4-11
Table 4.5 Signal delay times definition
No. Item Time definition
11 Hold time 45 ns The minimum time added between the assertion of
REQ (Or REQB) or ACK (or ACKB) and the
changing of the data lines to provide hold time in the
initiator or target while using synchronous data
transfers. REQB and ACKIB timings only apply to
optional wide data transfers.
12 Negation 90 ns The minimum time that a target shall negate REQ (Or
REQB) while using synchronous data transfers. Also,
the minimum time that an initiator shall negate ACK
(or ACKB) while using synchronous data transfers.
REQB and ACKB timings only apply to optional
wide data transfers.
13 Power-on to
selection
time
10 sec
(recommended)
The recommended maximum time from power
application until an SCSI target is able to respond
with appropriate status and sense data to the TEST
UNIT READY, INQUIRY, and REQUEST SENSE
commands
14 Reset to
selection
time
250 ms
(recommended)
The recommended maximum time after a hard
RESET condition until an SCSI target is able to
respond with appropriate status and sense data to the
TEST UNIT READY, INQUIRY and REQUEST
SENSE commands
15 Reset hold 25 æs The minimum time over which RST must be kept
asserted
16 Selection
abort time
200 æs The maximum time required from the moment when
selection or deselection of an initiator or target is
detected until BSY is asserted
17 Selection
timeout
delay
250 ms
(recommended)
The minimum time required for an initiator or target
in the selection or deselection phase to wait for a
BSY response before it starts the timeout procedure
18 Transfer
period
The minimum allowable period, during sync data
transfer, between the start of consecutive REQ pulses
and the start of consecutive ACK pulses
4.3.1 BUS FREE phase
The BUS FREE phase is used to indicate that no SCSI device is actively using the SCSI bus. and that it is available.
SCSI devices shall detect the BUS FREE phase after the SEL and BSY signals are both false for at least a bus settle
delay.
SCSI devices shall release all SCSI bus signals within a bus clear delay after the BSY and SEL signals become
continuously false for a bus settle delay.