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Hardware options installation 49
Advanced ECC
Advanced ECC memory is the default memory protection mode for the server. Standard ECC can correct
single-bit memory errors and detect multibit memory errors. When multibit errors are detected using Standard
ECC, the error is signaled to the server and causes the server to halt.
Advanced ECC protects the server against some multibit memory errors. Advanced ECC can correct both
single-bit memory errors and 4-bit memory errors if all failed bits are on the same DRAM device on the DIMM.
Advanced ECC provides additional protection over Standard ECC because it is possible to correct certain
memory errors that would otherwise be uncorrected and result in a server failure. Using HP Advanced
Memory Error Detection technology, the server provides notification when a DIMM is degrading and has a
higher probability of uncorrectable memory error.
Online Spare memory configuration
Online spare memory provides protection against degraded DIMMs by reducing the likelihood of
uncorrected memory errors. This protection is available without any operating system support.
Online spare memory protection dedicates one rank of each memory channel for use as spare memory. The
remaining ranks are available for OS and application use. If correctable memory errors occur at a rate
higher than a specific threshold on any of the non-spare ranks, the server automatically copies the memory
contents of the degraded rank to the online spare rank. The server then deactivates the failing rank and
automatically switches over to the online spare rank.
Lockstep memory configuration
Lockstep mode provides protection against multi-bit memory errors that occur on the same DRAM device.
Lockstep mode can correct any single DRAM device failure on x4 and x8 DIMM types. The DIMMs in each
channel must have identical HP part numbers.
General DIMM slot population guidelines
Observe the following guidelines for all AMP modes:
• Install DIMMs only if the corresponding processor is installed.
• When two processors are installed, balance the DIMMs across the two processors.
• White DIMM slots denote the first slot of a channel (Ch 1-A, Ch 2-B, Ch 3-C, Ch 4-D).
• Do not mix LRDIMMs, UDIMMs, or RDIMMs.
• Do not install more than two UDIMMs per channel. UDIMMs should not be installed in slots Ch 1-I, Ch
2-J, Ch 3-K, or Ch 4-L.
• When two processors are installed, install the DIMMs in sequential alphabetical order balanced
between the two processors: P1-A, P2-A, P1-B, P2-B, P1-C, P2-C, and so on.
For detailed memory configuration rules and guidelines, use the Online DDR3 Memory Configuration Tool
on the HP website (http://www.hp.com/go/ddr3memory-configurator).
DIMM speeds are supported as indicated in the following table.
Populated slots
(per channel)
Rank Speeds supported (MT/s)
1
Single- or dual-rank 1333, 1600