HP (Hewlett-Packard) E2047551001R Computer Hardware User Manual


 
ECM-5510
20 ECM-5510 User’s Manual
1.6.7 NS DS90C385 LVDS Transmitter
The DS90C385 transmitter converts 28 bits of LVCMOS/LVTTL data into four LVDS (Low
Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in
parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28
bits of input data are sampled and transmitted. At a transmit clock frequency of 85 MHz, 24
bits of RGB data and 3 bits of LCD timing and control data (FPLINE, FPFRAME, DRDY)
are transmitted at a rate of 595 Mbps per LVDS data channel. Using a 85 MHz clock, the
data throughput is 297.5 Mbytes/sec. Also available is the DS90C365 that converts 21 bits
of LVCMOS/LVTTL data into three LVDS (Low Voltage Differential Signaling) data streams.
Both transmitters can be programmed for Rising edge strobe or Falling edge strobe through
a dedicated pin. A Rising edge or Falling edge strobe transmitter will interoperate with a
Falling edge strobe Receiver (DS90CF386/DS90CF366) without any translation logic.
1.6.8 ITE IT8888F PCI-ISA Bridge
The IT8888F is a PCI to ISA bridge single function device. The IT8888F serves as a bridge
between the PCI bus and ISA bus. The IT8888F’s 32-bit PCI bus interface is compliant with
PCI Specification V2.1 and supports both PCI Bus Master & Slave.