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SERIAL INTERFACE DEVELOPERS GUIDE
6.7 Command Polling
During normal operation of the embedded application, a poll is done to check for user defined
commands that have been issued by the host. When a command is detected the appropriate action is
taken. Once the action is completed the command status is either reset or set to a status (see list
below) to let the host know that it can proceed with the task at hand.
/* PC Master Command Code Response Enumerations */
enum
{
CMDST_OK = 1,
CMDST_SFLASH_PAGE_READY,
CMDST_SFLASH_NOT_ERASED,
CMDST_INVALID_PARAMETER,
CMDST_X_DATA_READY,
CMDST_P_DATA_READY,
CMDST_XFLASH_RW_ERROR,
CMDST_PFLASH_RW_ERROR,
CMDST_NUC_FLASH_BUSY,
CMDST_INVALID_PIN,
CMDST_MEMORY_LOCKED,
CMDST_TIMEOUT,
CMDST_UNDEFINED
};
The use of a command status other than CMDST_OK is typically used for providing the host with an
indication of the result of the latest command. For example, when reading a page of serial data flash,
two commands are required. The first would be CMD_COPY_SFLASH_PAGE, which reads the data
from flash, places the data in the scratch pad buffer, and then sets the command status to
CMDST_SFLASH_PAGE_READY. When the host sees that the data is available (using the
McbGetAppCmdStatus routine), it can execute a McbReadDataMem command to retrieve that data.
As long as the return status is not MCB_APPCMDRESULT_RUNNING a command may be issued to
the camera.
6.8 Access to DSP Peripheral Registers (ArchIO)
The DSP peripheral registers are mapped into data memory space. These registers can be read from
or written to using the standard ‘McbReadDataMem/McbWriteDataMem’ functions. Since the
embedded application has built in drivers controlling the enabled peripherals, it is not recommended
that the host application modifies any of these registers. It can be useful though to read various
registers directly once the embedded application has initialized the peripherals. For example by
reading the memory at the proper address, all of the current ADC count results can be obtained.
Using the proper equations, these values can be converted to temperatures for the user application.
Information on these registers can be obtained in the Motorola DSP56F80X User’s Manual
(DSP56F801-7UM/D).
The base register is mapped to memory address location 0x1000.
6.9 Access to Xilinx FPGA Registers (FpgaIO)
The Xilinx FPGA registers are mapped into DSP external memory data space. The data structure (or
register map) is shown in
XAppendix BX. These registers can be read from or written to using the
standard ‘McbReadDataMem/McbWriteDataMem’ functions, although it is not recommended that
these registers are written to unless the user fully understands the results of the register modification.
• The base register is mapped to address location 0x4000.
• The registers are only available after the FPGA has been configured by embedded
application.
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