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Intel
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21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller
Design Guide 19
4.0 21143 Requirements
This section provides information about the external component connections for the 21143, and
describes the following requirements:
• Unused JTAG port requirements
• Current reference and capacitor input
• Crystal connection or crystal oscillator connection for the serial clock connection
4.1 Unused JTAG Port Requirements
Table 10 describes the 21143 signal pin requirements if you are not using the JTAG port.
4.2 Current Reference and Capacitor Input Requirements
Table 11 describes the current reference and capacitor input requirements for the 21143, and
Figure 10 shows the external component connections.
Table 10. Pin Requirements When Not Using the JTAG Port
Leave the Following JTAG Pins Open Pull the Following JTAG Pin Up or Down
tms (pin 1) tck (pin 120)
tdi (pin 2)
tdo (pin 4)
Table 11. Current Reference and Capacitor Inputs
Pin Name Pin Number Function Connect This Pin...
iref 108
Current reference input for the analog
phase-locked loop (PLL)
Through a 2.4 k
Ω resistor to ground
vcap_h 110 Capacitor input Through a 0.022
µF capacitor to ground