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332 Software Developer’s Manual
Register Descriptions
13.6.2 Wakeup Filter Control Register
WUFC (05808h; R/W)
This register is used to enable each of the pre-defined and flexible filters for wakeup support. A
value of 1b means the filter is turned on, and a value of 0b means the filter is turned off.
This register is reset any time LAN_PWR_GOOD is 0b. When AUX_POWER equals 0b, this
register is also reset by deasserting (rising edge) RST#.
APMPME 3 0b
Assert PME On APM Wakeup
If set to 1b, the Ethernet controller sets the PME_Status bit in
the Power Management Control / Status Register (PMCSR)
and asserts PME# when APM Wakeup is enabled and the
Ethernet controller receives a matching Magic Packet. This
field value is loaded from the EEPROM.
Note: Not applicable to the 82541ER.
Reserved 27:4 0b
Reserved
Reads as 0b.
Dynamic
Powerdown
1
28 0b
Dynamic Powerdown Mode
When programmed to 1b, enables dynamic powerdown
operation.
Auto Freq
Select
1
30:29 0b
2
Automatic Frequency Select
Determines automatic reduction of MAC frequency in 82541xx
only. Reserved for the 82547GI/EI.
Bit 29 controls MAC speed at 1000 MB. When cleared,
enables the MAC to run at full speed. When set and PCI is
configured for 33 MHz (82541xx), allows the MAC to run at
half speed.
Bit 30 controls MAC speed at other Ethernet rates. When
cleared, allows the MAC to run at full speed. When set, it
allows the MAC to run at quarter speed.
If both bits are cleared, the MAC frequency select bits control
MAC frequency.
SPM
1
31 0b
Smart Powerdown MAC
When programmed to 0b, the MAC operates normally. When
programmed to 1b, the MAC enters smart powerdown mode.
Reserved
3
31:28 0b
Reserved
Reads as 0b.
1. 82541xx and 82547GI/EI only.
2. Loaded from the EEPROM.
3. Not applicable to the 82541xx and 82547GI/EI.
Field Bit(s)
Initial
Value
Description