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Software Developer’s Manual 333
Register Descriptions
13.6.3 Wakeup Status Register
WUS (05810h; R)
This register is used to record statistics about all wakeup packets received. If a packet matches
multiple criteria then multiple bits could be set. Writing a 1b to any bit clears that bit.
This register is not cleared when RST# is asserted. It is only cleared when LAN_PWR_GOOD is
de-asserted or when cleared by the driver software.
31 20 19 18 17 16 15 14 8 7 6 5 4 3 2 1 0
Reserved FLX3 FLX2 FLX1 FLX0 ITCO
1
Reserved IPv6
2
IPv4
3
ARP BC MC EX MAG LNKC
1. 82541xx and 82547GI/EI only.
2. Not applicable to the 82544GC/EI.
3. IP for the 82544GC/EI.
Field Bit(s) Initial Value Description
LNKC 0 0b Link Status Change Wakeup Enable.
MAG 1 0b Magic Packet Wakeup Enable.
EX 2 0b Directed Exact Wakeup Enable.
MC 3 0b Directed Multicast Wakeup Enable.
BC 4 0b Broadcast Wakeup Enable.
ARP 5 0b ARP Request Packet Wakeup Enable.
IPv4
1
1. IP for the 82544GC/EI.
6 0b Directed IPv4 Packet Wakeup Enable.
IPv6
2
2. Not applicable to the 82544GC/EI.
7 0b Directed IPv6 Packet Wakeup Enable.
Reserved 14:8 0b Reserved. Set these bits to 0b.
ITCO
3
3. 82541xx and 82547GI/EI only.
15 0 Ignore TCO/management packets for wakeup.
FLX0 16 0b Flexible Filter 0 Enable.
FLX1 17 0b Flexible Filter 1 Enable.
FLX2 18 0b Flexible Filter 2 Enable.
FLX3 19 0b Flexible Filter 3 Enable.