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8 Intel® Xeon® Processor E5-1600/ E5-2600/E5-4600 Product Families
Datasheet Volume One
10-1 STS200C Passive/Active Combination Heat Sink (with Removable Fan) ...................244
10-2 STS200C Passive/Active Combination Heat Sink (with Fan Removed)......................244
10-3 STS200P and STS200PNRW 25.5 mm Tall Passive Heat Sinks ................................245
10-4 Boxed Processor Motherboard Keepout Zones (1 of 4) ..........................................246
10-5 Boxed Processor Motherboard Keepout Zones (2 of 4) ..........................................247
10-6 Boxed Processor Motherboard Keepout Zones (3 of 4) ..........................................248
10-7 Boxed Processor Motherboard Keepout Zones (4 of 4) ..........................................249
10-8 Boxed Processor Heat Sink Volumetric (1 of 2) ....................................................250
10-9 Boxed Processor Heat Sink Volumetric (2 of 2) ....................................................251
10-10 4-Pin Fan Cable Connector (For Active Heat Sink) ................................................252
10-11 4-Pin Base Baseboard Fan Header (For Active Heat Sink) .....................................253
10-12 Fan Cable Connector Pin Out For 4-Pin Active Thermal Solution.............................255
Tables
1-1 Referenced Documents.......................................................................................22
2-1 Summary of Processor-specific PECI Commands ....................................................30
2-2 Minor Revision Number Meaning ..........................................................................33
2-3 GetTemp() Response Definition ...........................................................................35
2-4 RdPkgConfig() Response Definition.......................................................................36
2-5 WrPkgConfig() Response Definition ......................................................................37
2-6 RdPkgConfig() & WrPkgConfig() DRAM Thermal and Power Optimization
Services Summary.............................................................................................39
2-7 Channel & DIMM Index Decoding .........................................................................41
2-8 RdPkgConfig() & WrPkgConfig() CPU Thermal and Power Optimization
Services Summary.............................................................................................46
2-9 Power Control Register Unit Calculations ...............................................................51
2-10 RdIAMSR() Response Definition ...........................................................................62
2-11 RdIAMSR() Services Summary.............................................................................62
2-12 RdPCIConfig() Response Definition.......................................................................65
2-13 RdPCIConfigLocal() Response Definition................................................................67
2-14 WrPCIConfigLocal() Response Definition................................................................68
2-15 WrPCIConfigLocal() Memory Controller and IIO Device/Function Support...................69
2-16 PECI Client Response During Power-Up.................................................................69
2-17 SOCKET ID Strapping.........................................................................................71
2-18 Power Impact of PECI Commands vs. C-states.......................................................71
2-19 Domain ID Definition..........................................................................................74
2-20 Multi-Domain Command Code Reference...............................................................74
2-21 Completion Code Pass/Fail Mask ..........................................................................75
2-22 Device Specific Completion Code (CC) Definition ....................................................75
2-23 Originator Response Guidelines............................................................................76
2-24 Error Codes and Descriptions...............................................................................77
4-1 System States...................................................................................................87
4-2 Package C-State Support....................................................................................87
4-3 Core C-State Support.........................................................................................88
4-4 System Memory Power States .............................................................................88
4-5 DMI2/PCI Express* Link States............................................................................89
4-6 Intel QPI States.................................................................................................89
4-7 G, S and C State Combinations............................................................................90
4-8 P_LVLx to MWAIT Conversion ..............................................................................92
4-9 Coordination of Core Power States at the Package Level..........................................95