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CHAPTER 5 DIFFERENCES BETWEEN TARGET DEVICE AND TARGET INTERFACE CIRCUIT
User’s Manual U15776EJ1V0UM
31
Figure 5-1. Equivalent Circuit of Emulation Circuit (1/2)
QS3125
QS3244
VHC125
PORTV
DD0
IN/OUT
IN/OUT
QS3257
IN/OUT
IN
OUT
PORTV
DD0
PORTV
DD0
PORTV
DD1
PORTV
DD1
PORTV
DD2
QS3244
VHC244
VHC125
IN
OUT
QS3384
OR3T125
(FPGA)
IE system sideProbe side
P00,
P36 to P34
P107 to P100
P67 to P60
P96 to P90
P113 to P110
P117 to P114
P133 to P130
P47 to P40,
P57 to P50
P07 to P01,
P17 to P10,
P27 to P20,
P37 to P30,
P77 to P70,
P83 to P80,
P127 to P120,
P147 to P140,
P157 to P150,
P176 to P170
VHC125
IN
OUT
QS3257
VHC125
IN
OUT
QS3244
VHC125
IN
OUT
VHC125
IN
OUT
PD703091
PD70F3089Y
emulation
CPU
µ
µ