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DDR3THIN-MN-XXX 41 Doc. Rev. 1.11
Latency of <= 5 cycles the support software will store a total of 13 clock cycles
worth of data after the Read or Write Command appears on the bus.
Refresh Cycles: – Permits choosing whether Refresh Cycles will be stored or not. The
field choices are:
Acquire (default) – Refresh Cycles will be stored.
Do Not Acquire – This mode will reduce the number of Refresh cycles stored by
the acquisition card to provide optimum use of the acquisition memory.
NOTE: This mode is disabled when the SDRAM Clocking choice is set to a
Every Rising Edge selection.
4.2 B_DDR3D_2G Clocking Selections
There is one clocking option field available when using the B_DDR3D_2G support package.
These select fields permit the user to setup the TLA acquisition as follows:
Active Chip Selects: – Permits selecting which of 8 possible Chip Selects are active on
the target. The rising edge of the DDR Clock is always used to acquire data. How the
display software interprets which Chip Selects are active will be based on this field
setting. With 8 possible Chip Selects and 6 Clock Enable signals it is possible to support
data acquisition from a 3 slot channel at 800. See section 3.6 for channel configuration.
This support only allows one quad rank support in slot A (the interposer slot), or most
combinations of single and dual rank DIMMs in the three slots.
The “B” slot is the DIMM slot between the Interposer and the memory controller.
The “C” slot is the slot nearest the memory controller in a three slot system.
The field choices shown correspond to the Chip Select number defined in the channel
map, and are as follows:
Chip Select(s) Equivalent Memory DIMM configuration
C:____B:____A:___0 0r0r1r (default) –
Only S0# in the Interposer slot is active; all other Chip Selects will be
forced inactive (high) by the support package. Equivalent to one Single
Rank DIMM.
C:____B:____A:__10 0r0r2r –
S0# and S1# in the Interposer slot are active, equivalent to a Dual Rank
DIMM.
C:____B:____A:3210 0r0r4r –
S0#, S1#, S2# and S3# in the Interposer slot are active, equivalent to a
Quad Rank DIMM.