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2 Instructions
2-348
CP1E CPU Unit Instructions Reference Manual(W483)
(3) Parallel Control
Step (A) W0.00
Step (B) W0.01
Step (C) W0.02
End
0.05 (Step (C) reset conditions)
Step (D) W0.02
Step (E) W0.04
0.04 (When both Step (B) and Step (D)
are complete, moves to Step (E)
0.03 (Step (C) → Step (D)
transition condition)
0.01 (Step (A), (C) simultaneous starting condition)
0.02 (Step (A) →
Step (B) transition
condition)
STEP
W0.01
SNXT
W0.02
0.01
SNXT
W0.00
STEP
W0.02
200.03
0.04
W0.03
0.03
SNXT
W0.03
STEP
W0.00
0.02
SNXT
W0.01
STEP
W0.03
STEP
W0.04
STEP
0.05
SNXT
W0.04
SNXT
W30.0
Step (A) ladder program
Step W0.00 (A)
Step W0.01
(B)
Step (B) ladder program
Step W0.02
(C)
Step (C) ladder program
Step W0.03
(D)
Step (D) ladder program
Step W0.04
(E)
Step (E) ladder program