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3 Instruction Execution Times and Number of Steps
3-10
CP1E CPU Unit Instructions Reference Manual(W483)
Subroutine Instructions
Instruction Mnemonic
FUN
No.
Length
(steps)
ON execution
time (µs)
Conditions
SUBROUTINE CALL SBS 091 2 6.6 ---
SUBROUTINE ENTRY SBN 092 2 2.6 ---
SUBROUTINE RETURN RET 093 1 3.1 ---
Interrupt Control Instructions
Instruction Mnemonic
FUN
No.
Length
(steps)
ON execution
time (µs)
Conditions
SET INTERRUPT MASK MSKS 690 3 15.1 Set
15.1 Reset
CLEAR INTERRUPT CLI 691 3 14.9 Set
18.0 Reset
DISABLE INTERRUPTS DI 693 1 8.5 ---
ENABLE INTERRUPTS EI 694 1 8.9 ---
High-speed Counter and Pulse Output Instructions
Instruction Mnemonic
FUN
No.
Length
(steps)
ON execution
time (µs)
Conditions
MODE CONTROL
INI
880 4
46.0 Starting high-speed counter comparison
31.8 Stopping high-speed counter comparison
48.7 Changing pulse output PV
35.2 Changing high-speed counter PV
27.2 Stopping pulse output
13.0 Stopping PWM(891) output
HIGH-SPEED COUNTER PV
READ
PRV
881 4
40.0 Reading pulse output PV
35.0 Reading high-speed counter PV
37.2 Reading pulse output status
32.6 Reading high-speed counter status
24.5 Reading PWM(891) status
36.5 Reading high-speed counter range
comparison results
29.1 Reading frequency of high-speed counter 0
COMPARISON TABLE LOAD
CTBL
882 4 69.3 Registering target value table and starting
comparison for 1 target value
116.3 Registering target value table and starting
comparison for 6 target values
126.6 Registering range table and starting com-
parison
46.3 Only registering target value table for 1
target value
93.3 Only registering target value table for 6
target values
122.5 Only registering range table
SPEED OUTPUT
SPED
885 4
69.2 Continuous mode
74.0 Independent mode
SET PULSES
PULS
886 4
44.1
---
PULSE OUTPUT
PLS2
887 5
97.6
---