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2.3.4 External EEPROM
Rev.1.01
Oct 28, .2008 2-12
REJ10J1351-0101
2
Figure 2.3.7 EEPROM-AC Timing
SK
CS
DI
DO
Hi-Z
READ
Dummy SK
"0"
"1""1"
"0""1"
1 2
3 4 5 6
7 8 9 10
11 12 13 14
"x"
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
"x"
"0"
D15 D14 D13
D2 D1 D0 D15 D14 D13
D2 D1 D0
D15 D14 D13
27 28 29 30 31 32 44 45 46 47 4815 16
43
Hi-Z
SK
CS
DI
DO
Hi-Z
W
RITE
"0"
"1"
"0" "1"
1 2 3 4 5 6
7 8 9 10
11 12 13 14
"x"
A8
A7 A6
A5 A4
A3 A2
A1 A0
27 28 29 30 31 3215 16
Hi-Z
Setting Address
(Setting Address)Data0
(Setting Address)Data0
(Setting Address+1)Data1 (Setting Address+2)Data
2
D15 D14 D13
D2 D1 D0
"0"
"1"
Writing Instruction, Address, Writing Data Input
Verify Standby
Start writing End of writing
Dummy SK
Figure 2.3.8 EEPROM-Read/Write Timing
1 μsec
or more
SK
1 μsec or more
400 nsec or more
200 nsec or more
200 nsec or more
Writing
Enabled Data
Within 800 nsec
Within
800 nsec
Within 500 nsec
200 nsec or more
CS
DI
DO
Hi-Z
Hi-Z
Deselect
Output delay time
Output disabled time
HoldSetup
CS setup
Clock pulse width
Output Enabled Data
A
C characteristics
0 sec or more