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9.2. Application Headers
Table 9-5 to Table 9-8 below show the standard application header connections. * Marked pins are subject to option links.
JA1
Pin Header Name Circuit Net
Name
Device
Pin
Pin Header Name Circuit Net
Name
Device
Pin
1 Regulated Supply 1 CON_5V --- 2 Regulated Supply 1 GROUND ---
3 Regulated Supply 2 CON_3V3 --- 4 Regulated Supply 2 GROUND ---
5 Analog Supply NC --- 6 Analog Supply NC ---
7 Analog Reference CON_VREF* 77 8 ADTRG NC ---
9 ADC0 AN0* 76 10 ADC1 AN1* 74
11 ADC2 AN2* 73 12 ADC3 AN3 70
13 DAC0 DA0* 74 14 DAC1 DA1* 76
15 IOPort0 IO_0 65 16 IOPort1 IO_1 64
17 IOPort2 IO_2 63 18 IOPort3 IO_3 62
19 IOPort4 IO_4 61 20 IOPort5 IO_5 60
21 IOPort8 IO_6 59 22 IOPort7 IO_7 58
23 IRQ3 INT3n 46 24 I
2
C Bus (3rd pin) NC ---
25 IIC_SDA SDA 2 26 IIC_SCL SCL 80
Table 9-5: JA1 Standard Generic Header
JA2
Pin Header Name Circuit Net
Name
Device
Pin
Pin Header Name Circuit Net
Name
Device
Pin
1 Reset RESETn 9 2 External Clock Input CON_XIN* 12
3 Interrupt NC --- 4 Regulated Supply 1 VSS1 (GND) ---
5 WDT overflow NC --- 6 Serial Port TXD0 34
7 Interrupt INT0n 44 8 Serial Port RXD0 33
9 Interrupt INT1n 52 10 Serial Port RXD0 32
11 Motor up/down UD 79 12 Serial Port Handshake NC ---
13 Motor control Up 29 14 Motor control Un 27
15 Motor control Vp 26 16 Motor control Vn 24
17 Motor control Wp 25 18 Motor control Wn 23
19 Timer Output TMR0 51 20 Timer Output TMR1 50
21 Timer Input TRIGa 31 22 Timer Input TRIGb 28
23 Interrupt INT2n 53 24 Tristate Control TRISTn 36
25 SPARE --- --- 26 SPARE --- ---
Table 9-6: JA2 Standard Generic Header
17