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JA5
Pin Generic Header Name CPU board
Signal Name
Device
Pin
Pin Generic Header Name CPU board
Signal Name
Device
Pin
1 AD4 AN4 69 2 AD5 AN5 68
3 AD6 AN6 67 4 AD7 AN7 66
5 CAN1TX --- --- 6 CAN1RX --- ---
7 CAN2TX --- --- 8 CAN2RX --- ---
9 AD8 AN8 57 10 AD9 AN9 56
11 AD10 AN10 55 12 AD11 AN11 54
13 TIOC0A TRCIOA 17 14 TIOC0B TRCIOB 16
15 TIOC0C TRCIOC 15 16 M2_TRISTn --- ---
17 TCLKC TRCCLK 18 18 TCLKD TRDCLK 30
19 M2_Up --- --- 20 M2_Un --- ---
21 M2_Vp --- --- 22 M2_Vn --- ---
23 M2_Wp --- --- 24 M2_Wn --- ---
Table 9-7: JA5 Optional Generic Header
JA6
Pin Generic Header Name CPU board
Signal
Name
Device
Pin
Pin Generic Header Name CPU board
Signal Name
Device
Pin
1 DMA --- --- 2 DMA --- ---
3 DMA --- --- 4 Standby (Open drain) --- ---
5 Host Serial RS232TX* --- 6 Host Serial RS232RX* ---
7 Serial Port RxD2 48 8 Serial Port TxD2 49
9 Serial Port Synchronous TXD1 45 10 Serial Port CLK2 47
11 Serial Port Synchronous CLK1* 73 12 Serial Port Synchronous RXD1* 46
13 Reserved 14 Reserved
15 Reserved 16 Reserved
17 Reserved 18 Reserved
19 Reserved 20 Reserved
21 Reserved 22 Reserved
23 Reserved 24 Reserved
25 Reserved 26 Reserved
Table 9-8: JA6 Optional Generic Header
18