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ELECTRICAL SPECIFICATION SSD-DXXX(I)-4210 DATA SHEET
SILICONSYSTEMS PROPRIETARY
This document and the information contained within it is confidential and proprietary to SiliconSystems, Inc.
All unauthorized use and/or reproduction is prohibited.
4210D-03DSR PAGE 14 FEBRUARY 2, 2009
Notes:
1. The symbol t
0
is the minimum total cycle time, t
2
is the minimum command
active time, and t
2i
is the minimum command recovery time or command
inactive time. The actual cycle time equals the sum of the actual command
active time and the actual command inactive time. The three timing
requirements of t
0
, t
2
, and t
2i
must be met. The minimum total cycle time
requirement is greater than the sum of t
2
and t
2i
. This means a host
implementation can lengthen either or both t
2
or t
2i
to ensure that t
0
is equal
to or greater than the value reported in the device’s identify device data.
2. This parameter specifies the time from the negation edge of -IORD to the
time that the data bus is no longer driven by the drive (tristate).
Table 11: True IDE PIO Mode Read/Write Access Timing
Symbol Item Mode 0 Mode 1 Mode 2 Mode 3 Mode 4 Mode 5 Mode 6 Note Units
t
0
Cycle Time (minimum) 600 383 240 180 120 100 80 1 ns
t
1
Address Valid to
IORD/-IOWR Setup
(minimum)
70 50 30 30 25 15 10 - ns
t
2
-IORD/-IOWR (minimum) 165 125 100 80 70 65 55 1 ns
t
2
-IORD/-IOWR (minimum)
register (8 bit)
290 290 290 80 70 65 55 1 ns
t
2i
-IORD/-IOWR Recovery
Time (minimum)
- - - 70 25 25 20 1 ns
t
3
-IOWR Data Setup
(minimum)
60 45 30 30 20 20 15 - ns
t
4
-IOWR Data Hold
(minimum)
30 20 15 10 10 5 5 - ns
t
5
-IORD Data Setup
(minimum)
50 35 20 20 20 15 10 - ns
t
6
-IORD Data Hold
(minimum)
5 5 5 5 5 5 5 - ns
t
6Z
-IORD Data Tristate
(maximum)
30 30 30 30 30 20 20 2 ns
t
7
Address Valid to IOCS16
Assertion (maximum)
90 50 40 N/A N/A N/A N/A 4 ns
t
8
Address Valid to IOCS16
Released (maximum)
60 45 30 N/A N/A N/A N/A 4 ns
t
9
-IORD/-IOWR to
Address Valid Hold
20 15 10 10 10 10 10 - ns
t
RD
Read Data Valid to
IORDY Active
(minimum), if IORDY is
initially low after t
A
0 0 0 0 0 0 0 - ns
t
A
IORDY Setup Time 35 35 35 35 35
N/A
5
N/A
5
3 ns
t
B
IORDY Pulse Width
(maximum)
1250 1250 1250 1250 1250
N/A
5
N/A
5
-ns
t
C
IORDY Assertion to
Release (maximum)
5 5 5 5 5
N/A
5
N/A
5
-ns