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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
Revision 1.4 (08-19-08) 178 SMSC LAN9312
DATASHEET
5 RESERVED - This bit must be written with 0b for proper operation. R/W 0b
4
RX Status FIFO Full Interrupt Enable (RSFF_EN) R/W 0b
3
RX Status FIFO Level Interrupt Enable (RSFL_EN) R/W 0b
2:0
RESERVED RO -
BITS DESCRIPTION TYPE DEFAULT