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Telenetics 2185
Glossary-3
RDY Ready. LED indicator lamp that illuminates when
the main channel inbound DSR or DTR is ON.
Straight-Through
Cable
Cable terminated with 25-pin EIA connector at each
end. Connections are made on a pin-to-pin basis.
See Figure 2-2.
Subchannel
Contention
Subchannels contend for use of the main channel to
send data to the CPU or controller. If more than one
subchannel tries to access the main channel at one
time, the 2185 selects one subchannel and blocks
data from all the others. You may select either of
two contention modes — either data contention or
control signal contention.
Synchronous
Retiming Buffer
When operating in a synchronous data environment,
the 2185 uses an internal ±4-bit buffer to retime
inbound subchannel data to the main channel clock.
The buffer compensates for phase differences
between the subchannel and main channel clocks
and can absorb clock jitter and minor differences in
frequency.When the 2185 is configured for
asynchronous operation, the retiming buffer is
bypassed.