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42 Satellite P100 and Satellite Pro P100 Tests and Diagnostics Manual
Subtest 04 Bit Shift Pattern Test
This subtest reads the contents of cache memory and saves it into RAM. The
subtest then writes the bit shift data patterns (1 bit shifted every 4 bytes), reads
the new data and compares the result with the original data. The original
cache memory content is then restored to the cache memory.
Subtest 05 Write Disturb Test (We can’t support this time)
This subtest reads the contents of cache memory and saves it into RAM. The
subtest then writes the “write disturb data,” reads the new data and compares
the result with the original data. The original cache memory content is then
restored to the cache memory.
Subtest 06 Checker Board Test
This subtest reads the contents of cache memory and saves it into RAM. The
subtest then writes the “checker board data,” (data which is inverted
front/back and left/right) reads the new data and compares the result with the
original data. The original cache memory content is then restored to the cache
memory.
Subtest 07 Marching Test
This subtest reads the contents of cache memory and saves it into RAM. The
subtest then writes the “marching data,” (00H through 01H and 01H through
00H)
reads the new data and compares the result with the original data. The
original cache memory content is then restored to the cache memory.
Subtest 08 Working Data Test
This subtest reads the contents of cache memory and saves it into RAM. The
subtest then writes the “working data,”
reads the new data and compares the
result with the original data. The original cache memory content is then
restored to the cache memory.