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2 Troubleshooting Procedures 2.4 System Board Troubleshooting
2-36 [CONFIDENTIAL] TECRA A8 /Satellite Pro A120 Maintenance Manual (960-573)
Table 2-4-2 Debug port (Boot mode) error status (3/9)
D port status Inspection items Details
Initialization of North Bridge
I Initialization of South Bridge
Initialization of GPIO
(F100) Initialization of H/W (before DRAM
recognition)
Initialization of TI controller
Initialization of PIT channel 1
(Setting the refresh interval to “30μs”)
Check of DRAM type and size
(at cold boot)
When unsupported memory is connected,
becoming HLT after beep sound
HLT when DRAM size is 0
F101
SM-RAM stack area test HLT When it can not be used as a stack
Cache configuration
Cache permission (L1/L2 Cache)
CMOS access test (at cold boot) (HLT when an error is detected)
Battery level check of CMOS
CMOS checksum check
Initialization of CMOS data (1)
Setting of IRT status
(Setting of boot status and IRT busy flag, The
rest bits are 0)
F102
Storing DRAM size
F103 Resume branch (at cold boot)
Not resume when a CMOS error occurred
Not resume when resume status code is not set
Resume error check
S3 returning error (South Bridge)
Resume error F17AH
RSM_UNKNOWN_ERR
SM-RAM checksum check
Resume error F173H RSM_SMRAM_ERR
RAM area checksum check in system BIOS
Resume error F179H SM_RAMBIOS_ERR
Expansion memory checksum check
Resume error F176H RSM_EXTMEM_ERR
PnP RAM checksum check
Resume error F177H RSM_PNPRAM_ERR