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2.4 System Board Troubleshooting 2 Troubleshooting Procedures
TECRA A8 /Satellite Pro A120 Maintenance Manual (960-573) [CONFIDENTIAL] 2-37
Table 2-4-2 Debug port (Boot mode) error status (4/9)
D port status Inspection items Details
Transition to RESUME-MAIN
Reset of CPU clock to low
Prohibition of all SMI
Clearance of resume status
Return to ROM
Turning area of C0000h to EFFFFh to PCI
(Prohibition of DRAM)
Resume error process
Setting of resume error request
(F103)
Copying ROM/RAM of system BIOS (HLT, when error occurs)
F104
Security check
SMRAM initialization
APIC initialization
WakeUp factor check
SMRAM base rewriting and CPU
state map saving for BIOS
F105
Permission of SMI based on ASMI
Initialization of devices which need
initialization before PCI bus
initialization
Initialization of PCI Express
Setting of test pattern to channel 0 of PIT#0
Check whether the set test pattern can be read
Initialization of PIT channel 0
(Setting of timer interruption interval to 55ms)
Initialization of PIT channel 2
(Setting of the sound generator frequency to
664Hz)
Test of PIT channel 1 (Check whether the refresh
signal works normally in 30 micro-s refresh
interval) HLT, when the time is out
Test of PIT channel 2
(Check whether the speaker gate works
normally)
CPU clock measurement
Check of parameter block A
Permission of SMI except auto-off
function
F106
Judgment of destination (country)
from DMI data