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ASUS A7A266-E User’s Manual60
4. BIOS SETUP
4. BIOS SETUP
Chip Configuration
SDRAM Cycle Time tRAS [7T]
This feature controls the number of SDRAM clocks used for SDRAM
parameters Tras and Trc. Tras specifies the minimum clocks required
between active command and precharge command. Trc specifies the
minimum clocks required between active command and re-active com-
mand. Configuration options: [5T, 7T] [6T, 8T]
SDRAM MA/CMD Leadoff Timing [Fast]
Configuration options: [Fast] [Normal]
SDRAM Short-Latency Mode [Enabled]
Configuration options: [Enabled] [Disabled]
System Acceleration Mode [Disabled]
Configuration options: [Enabled] [Disabled]
Graphics Aperture Size [128MB]
This feature allows you to select the size of mapped memory for AGP
graphic data. Configuration options: [1MB] [2MB] [4MB] [8MB] [16MB]
[32MB] [64MB] [128MB] [256MB]
AGP Capability [4X Mode]
Configuration options: [1X] [2X] [4X]
AGP Fast Write [Enabled]
Configuration options: [Enabled] [Disabled]
Video Memory Cache Mode [UC]
USWC (uncacheable, speculative write combining) is a new cache tech-
nology for the video memory of the processor. It can greatly improve the
display speed by caching the display data. You must set this to UC
(uncacheable) if your display card cannot support this feature; otherwise
your system may not boot. Configuration options: [UC] [USWC]
Memory Hole At 15M-16M [Disabled]
This field allows you to reserve an address space for ISA devices that re-
quire it. Configuration options: [Disabled] [Enabled]
PCI 2.1 Latency Compliant [Enabled]
This function allows you to enable or disable PCI 2.1 features including
passive release and delayed transaction. Configuration options: [Disabled]
[Enabled]
Delay Transaction [Disabled]
Configuration options: [Disabled] [Enabled]
Onboard PCI IDE [Both]
You can select to enable the primary IDE channel, secondary IDE channel,
both, or disable both channels. Configuration options: [Both] [Primary]
[Secondary] [Disabled]
Onboard PCI Audio [Enabled]
Configuration options: [Enabled] [Disabled]