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UoD_SpW-10X_
UserManual
Issue:
3.4
SpW-10X
SpaceWire Router
User Manual
Date:
11
th
July 2008
Preliminary
23
written to or read from synchronously with the 30MHz system clock. An eight-bit data interface and an
extra control bit for end of packet markers are provided by each external port FIFO. Packets received
by the external port are routed by the routing control logic to the configuration port, SpaceWire link
ports or the other external port dependent on the packet address. Packets with invalid addresses are
discarded by the SpaceWire router.
3.3 CONFIGURATION PORT
The SpaceWire router has one configuration port which performs read and write operations to internal
router registers. Packets are routed to the configuration port when a packet with a leading address
byte of zero is received. The Remote Memory Access Protocol (RMAP) [AD2] to access the
configuration port. A detailed description of the RMAP command packet format is provided in section
7.6. If an invalid command packet is received then the error is flagged to an associated status register
and the packet is discarded. The internal router registers are described in section 9.
3.4 ROUTING TABLE
The SpaceWire router routing table is set by the router command packets to assign logical addresses
to physical destination ports on the router. A group of destination ports can be set, in each routing
table location, to enable group adaptive routing. In group adaptive routing a packet can be routed to
its destination through one of a set of output ports dependent on which ports in the set are free to use.
When a packet is received with a logical address the routing table is checked by the routing control
logic and the packet is routed to the destination port when the port is ready.
Routing table locations are set to invalid at power on or at reset. An invalid routing address will cause
the packet to be spilled by the control logic. The routing table logical addresses can also be set to
support high priority and header deletion. High priority packets are routed before low priority packets
and header deletion of logical addresses can be used to support regional logical addressing (see
AD1).
3.5 ROUTING CONTROL LOGIC AND CROSSBAR
The routing control logic is responsible for arbitration of output ports, group adaptive routing and the
crossbar switching. Arbitration is performed when two or more source ports are requesting to use the
same destination port. A priority based arbitration scheme with two priority levels, high and low, is
used where high priority packets are routed before low priority packets. Fair arbitration is performed
on packets which have the same priority levels to ensure each packet gets equal access to the output
port.
Group adaptive routing control selects one of a number of output ports for sending out the source
packet.