Filter
Top Products
PRELIMINARY CY8CNP102B, CY8CNP102E
Document #: 001-43991 Rev. *D Page 30 of 38
AC Operational Amplifier Specifications
Settling times, slew rates, and gain bandwidth are based on the Analog Continuous Time PSoC block.
AC Digital Block Specifications
Table 36. 5V AC Operational Amplifier Specifications (CY8CNP102E)
Symbol Description Min Typ Max Units
T
ROA
Rising Settling Time to 0.1% for a 1V Step (10 pF load, Unity Gain)
Power = Low, Opamp Bias = Low – – 3.9 μs
Power = Medium, Opamp Bias = High – – 0.72 μs
Power = High, Opamp Bias = High – – 0.62 μs
T
SOA
Falling Settling Time to 0.1% for a 1V Step (10 pF load, Unity Gain)
Power = Low, Opamp Bias = Low – – 5.9 μs
Power = Medium, Opamp Bias = High – – 0.92 μs
Power = High, Opamp Bias = High – – 0.72 μs
SR
ROA
Rising Slew Rate (20% to 80%) of a 1V Step
(10 pF load, Unity Gain)
Power = Low, Opamp Bias = Low 0.15 – – V/μs
Power = Medium, Opamp Bias = High 1.7 – – V/μs
Power = High, Opamp Bias = High 6.5 – – V/μs
SR
FOA
Falling Slew Rate (20% to 80%) of a 1V Step
(10 pF load, Unity Gain)
Power = Low, Opamp Bias = Low 0.01 – – V/μs
Power = Medium, Opamp Bias = High 0.5 – – V/μs
Power = High, Opamp Bias = High 4.0 – – V/μs
BW
OA
Gain Bandwidth Product
Power = Low, Opamp Bias = Low 0.75 – – MHz
Power = Medium, Opamp Bias = High 3.1 – – MHz
Power = High, Opamp Bias = High 5.4 – – MHz
E
NOA
Noise at 1 kHz (Power = Medium, Opamp Bias = High) – 100 – nV/rt-Hz
Table 37. 5V AC Digital Block Specifications (CY8CNP102E)
Function Description Min Typ Max Units Notes
All
Functions
Maximum Block Clocking Frequency 49.2 MHz 4.75V ≤ Vcc ≤ 5.25V.
Timer Capture Pulse Width 50
[8]
– – ns
Maximum Frequency, No Capture
– – 49.2 MHz 4.75V ≤ Vcc ≤ 5.25V.
Maximum Frequency, With Capture
– – 24.6 MHz 4.75V ≤ Vcc ≤ 5.25V.
Counter Enable Pulse Width 50
[8]
– – ns
Maximum Frequency, No Enable Input – – 49.2 MHz 4.75V ≤ Vcc ≤ 5.25V.
Maximum Frequency, Enable Input – – 24.6 MHz 4.75V ≤ Vcc ≤ 5.25V.
Dead Band Kill Pulse Width:
Asynchronous Restart Mode 20 – – ns
Synchronous Restart Mode 50
[8]
– – ns
Disable Mode 50
[8]
– – ns
Maximum Frequency – – 49.2 MHz 4.75V ≤ Vcc ≤ 5.25V
CRCPRS
(PRS Mode)
Maximum Input Clock Frequency – – 49.2 MHz 4.75V ≤ Vcc ≤ 5.25V
[+] Feedback