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Ultra37000 CPLD Family
Document #: 38-03007 Rev. *E Page 24 of 64
Power Consumption
Typical 5.0V Power Consumption
CY37032
CY37064
0
10
20
30
40
50
60
0 50 100 150 200 250
Frequency (MHz)
Icc (mA)
High Speed
Low Power
The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.
V
CC
= 5.0V, T
A
= Room Temperature
The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.
V
CC
= 5.0V, T
A
= Room Temperature
0
10
20
30
40
50
60
70
80
90
0 20 40 60 80 100 120 140 160 180
Frequency (MHz)
Icc (mA)
Low Power
High Speed
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