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Ultra37000 CPLD Family
Document #: 38-03007 Rev. *E Page 30 of 64
CY37384V
CY37512V
Typical 3.3V Power Consumption (continued)
0
20
40
60
80
100
120
140
160
180
200
0102030405060708090
Frequency (MHz)
Icc (mA)
Low Power
High Speed
The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.
V
CC
= 3.3V, T
A
= Room Temperature
0
50
100
150
200
250
0102030405060708090
Frequency (MHz)
Icc (mA)
Low Power
High Speed
The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.
V
CC
= 3.3V, T
A
= Room Temperature
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