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Ultra37000 CPLD Family
Document #: 38-03007 Rev. *E Page 9 of 64
Logic Block Diagrams
CY37032/CY37032V
LOGIC
BLOCK
B
LOGIC
BLOCK
A
36
16
36
16
Input
Clock/
Input
16 I/Os
16 I/Os
I/O
0
−I/O
15
I/O
16
−I/O
31
4
4
4
16
16
TDI
TCK
TMS
TDO
JTAG Tap
Controller
1
PIM
JTAG
EN
LOGIC
BLOCK
D
LOGIC
BLOCK
C
LOGIC
BLOCK
A
LOGIC
BLOCK
B
36
16
36
16
36
16
36
16
Input
Clock/
Input
16 I/Os
16 I/Os
16 I/Os
16 I/Os
I/O
0
-I/O
15
I/O
16
-I/O
31
I/O
48
-I/O
63
I/O
32
-I/O
47
4
4
4
32
32
TDI
TCK
TMS
TDO
JTAG Tap
Controller
1
PIM
CY37064/CY37064V
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