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EM78P458/459
OTP ROM
1. ADC Control Register (ADCON/R9, AD-CMP-CON/IOCA0, GCON/IOC90)
1.1 ADCON/R9
The ADCON register controls the operation of the A/D conversion and decides which pin should
be currently active.
BIT 7 6 5 4 3 2 1 0
SYMBOL - - IOCS ADRUN ADPD ADIS2 ADIS1 ADIS0
*Init_Value 0 0 0 0 0 0 0 0
*Init_Value: Initial value at power on reset
• ADRUN (bit 4): ADC starts to RUN.
1 = an A/D conversion is started. This bit can be set by software.
0 = reset on completion of the conversion. This bit can not be reset in software.
• ADPD (bit 3): ADC Power-down Mode.
1 = ADC is operating;
0 = switch off the resistor reference to save power even when the CPU is operating.
• ADIS2~ADIS0 (bit 2~0): Analog Input Select.
000 = AN0;
001 = AN1;
010 = AN2;
011 = AN3;
100 = AN4;
101 = AN5;
110 = AN6;
111 = AN7;
Change occurs only when the ADIF bit and the ADRUN bit are both LOW.
1.2 AD-CMP-CON/IOCA0
The AD-CMP-CON register defines the pins of Port 6 as analog inputs or as digital I/O,
individually.
BIT 7 6 5 4 3 2 1 0
SYMBOL VREFS CE COE IMS2 IMS1 IMS0 CKR1 CKR0
*Init_Value 0 0 0 0 0 0 0 0
*Init_Value: Initial value at power on reset
• VREFS (Bit 7): The input source of the Vref of the ADC.
This specification is subject to change without prior notice. 07.01.2003 (V1.3)
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