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Table 6-3 (b) BIOS Beep Codes
Beep
Code
Diagnostic
Code
Description Test Performed
2-1-1
2-1-2
2-1-3
2-1-4
2-2-1
2-2-2
2-2-3
2-2-4
2-3-1
2-3-2
2-3-3
2-3-4
2-4-1
2-4-2
2-4-3
2-4-4
10h-1Fh
First 64K RAM chip or data
line failure on bit x
The first 64K of RAM is tested with a
rolling ones test and a pattern test. If any
of the rolling ones tests fail, then the
BIOS reports the specific bit that failed.
To determine the bit number from the
diagnostic code, subtract 10h. For
example, if 12h is displayed at the
diagnostic port, bit 2 failed. Failure
results in a system halt.
3-3-1 20h
Slave DMA register test in
progress or failure.
Pattern test of channels 1 through 3 of
the slave controller (starting port address
= 02h). Failure results in a system halt.
3-1-2 21h
Master DMA register test in
progress or failure.
Pattern test of channels 1 through 3 of
the master DMA controller (starting port
address = C4h). Failure results in a
system halt.
3-1-3 22h
Master interrupt mask register
test in progress or failure.
Rolling ones and zeros tests of the mask
register of the master programmable
interrupt controller (port 21h). Failure
results in a system halt.
3-1-4 23h
Slave interrupt mask register
test in progress or failure.
Rolling ones and zeros tests of the mask
register of the master programmable
interrupt controller (port A1h). Failure
results in a system halt.
none 25h
Interrupt vector loading in
progress.
No specific test is performed - just
indicates that the Interrupt Vector table is
being initialized.
3-2-4 27h
Keyboard controller test in
progress or failure.
The self-test command (AAh) is issued to
the 8042 (keyboard controller) and the
results are monitored. Failure results in a
system halt.
None 28h
CMOS RAM power failure
and checksum calculation
test in progress.
The power-fail bit in CMOS RAM is
tested and the lower CMOS RAM area is
being checksummed. A failure does not
result in system halt.
None 29h
CMOS RAM configuration
validation for video in
progress.
No specific test is performed - just
indicates that the configuration specified
in CMOS for video is being matched
against the actual installation. A failure
does not result in a system halt.
6-6 FIC M295 / M296 Service Manual