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Software Functional Overview
Register Bit Number
Function Address
Name
R/W
7 6 5 4 3 2 1 0
Logic Default Description
6Ch
PMU_LOW_
ADR
R/W DATA [7:0] - -
6Dh
PMU_HIG_
ADR
R/W DATA [15:8] - -
6Eh
CHECK_
SUM
R/W DATA [7:0] - -
PMU
Access
6Fh PMU_DATA R/W DATA [7:0] - -
These registers are available when
PMU slave mode or charger mode is
selected.
For detail information, refer to PMU
slave communication section in this
document
70h
*7
SMB_PTCL R/W PROTOCOL[7:0] - -
71h
*7
SMB_STS R/W
D
O
N
E
A
L
R
M
R
E
S
STATUS
[4:0]
- -
72h SMB_ADDR R/W
ADDRESS
[6:0]
R
E
S
- -
73h SMB_CMD R/W COMMAND - -
74h
to
93h
SMB_DATA
[0-31]
R/W DATA - -
94h SMB_BCNT R/W RES[7:5] BCNT[4:0] - -
95h
SMB_
ALARM_
ADDR
R(/W) ADDRESS[6:0]
R
E
S
- -
96h
to
97h
AMB_
ALARM_
DATA[0-1]
R(/W) DATA - -
For detail information, refer to ACPI
1.0 specification
[ 13.9 SMBus Host controller
Interface via Embedded controller]
These registers are not available when
PMU slave mode or charger mode is
selected.
The PMU06 has access protect
function for the EEPROM in the
battery, to cancel the protection, set
the access protect cancel bit.
For detail, refer to SMBus section
SMBus
98h SMB_CNRL R/W RES[7:1]
P
R
T
0x00
PRT =1 :
The SMBus address
(A8-AE) protection
is cancelled.
Reserved
99h
to
9Fh
Reserved R/W Don't care - -
*7: When this register is checked by polling, the interval time is necessary more than 500usec.
R(/W): This is the read only register, but the written data will be able to read back till PMU updates the data
periodically, or PMU detects the status change.
3-38 FIC M295 / M296 Service Manual