HP (Hewlett-Packard) EZ-KIT Switch User Manual


 
Getting Started with ADSP-BF548 EZ-KIT Lite 2-3
Using ADSP-BF548 EZ-KIT Lite to Investigate Performance
Factors
The ADSP-BF548 processor also supports asynchronous memories, the
internal operations of which are not tied to either of the processor’s main
clocks. Typically, these are flash memory devices, of which the
ADSP-BF548 processor supports a number of different types. The
ADSP-BF548 EZ-KIT Lite is populated with these flash devices:
NOR. The easiest to use but most costly form of flash memory.
NOR can be read without any special handling in software. The
final chapter of this tutorial, “Creating A Bootable Application” on
page 7-1, shows how to build an application to burn to NOR flash.
The application will be launched each time the EZ-KIT Lite is
powered up or reset, without the need for the EZ-KIT Lite to con-
nect to VisualDSP++.
NAND. The largest and least expensive form of flash available, but
prone to errors through bad blocks and wearing. Because of this,
NAND flash is most often accessed as a file system, rather than as
straight memory, through library calls such as
mkdir() and
fopen(). The EZ-KIT Lite NAND flash is not explored directly in
this tutorial, but its usage (from a software point of view) is funda-
mentally identical to that of the hard disk explored in a later
chapter.
SERIAL. Some flash memories are designed to be accessed serially,
receiving and supplying data one bit per clock cycle rather than in
eight-bit or 16-bit units. Typically such memories are used for very
low traffic tasks, such as storing configuration parameters that are
read-only or modified infrequently. The EZ-KIT Lite has one such
device connected to one of the SPI ports of the processor. This
tutorial does not cover the serial flash device operations.
Note that access to the L1, L2, DDR SDRAM, and NOR flash memories
can be made via the Blackfin processor’s standard read and write instruc-
tions (as generated by the C/C++ compiler), whereas access to other
memories generally requires special sequences of commands to be written
to the processor’s control registers.