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2.4 I/O Configuration
The cPB-4612 addresses up to 64 KB of I/O using a 16-bit I/O address. The cPB-4612 is populated with
many commonly used I/O peripheral devices. The I/O address location for each peripheral is shown in the
"I/O Address Map" illustration.
I/O Address Map
D00 - FFFFh PCI*
*Onboard ISA peripherals
CF8 - CFFh PCI Config/RST Control
addressed between
780 - CF7h PCI Reserved
100h - 7FFh decode 11 bits
778 - 77Fh LPT ECP Registers
of address (A0h - A10h).
400 - 777h
Reserved
Therefore, these peripherals
3F8 - 3FFh COM1
will alias throughout the 16-bit
3F0 - 3F7h Floppy / IDE Registers
I/O space at the following
3E0 - 3EFh
Reserved
ranges:
3B0 - 3DFh VGA Registers
x100-x3FFh
380 - 3AFh
Reserved
x500-x7FFh
378 - 37Fh LPT
x900-xBFFh
300 - 377h
Reserved
xD00-xFFFh
2F8 - 2FFh COM2
PCI devices can fully utilize
200 - 2F7h
Reserved
the address space from
1F8 - 1FFh
Reserved
D00 - FFFFh, since subtractive
1F0 - 1F7h Primary IDE Registers
decoding is used for the
178 - 1DFh
Reserved
onboard ISA devices.
170 - 177h Secondary IDE Registers
100 - 16Fh
Reserved
F0 - FFh Coprocessor
E0 - EFh
Reserved
C0 - DFh On-board Slave DMA Controller
B4 - BFh
Reserved
B2 - B3h APM Registers
B0 - B1h
Reserved
A0 - AFh On-board Slave Interrupt Controller
93 - 9Fh
Reserved
92h Fast RESET and Gate A20
90 - 91h
Reserved
81 - 8Fh On-board DMA Page Registers