Intel E5-2600 Computer Hardware User Manual


 
Overview
18 Intel® Xeon® Processor E5-1600/E5-2600/E5-4600 Product Families
Datasheet Volume One
1.2.3 Direct Media Interface Gen 2 (DMI2)
Serves as the chip-to-chip interface to the Intel® C600 Chipset
The DMI2 port supports x4 link width and only operates in a x4 mode when in DMI2
Operates at PCI Express* 1.0 or 2.0 speeds
Transparent to software
Processor and peer-to-peer writes and reads with 64-bit address support
APIC and Message Signaled Interrupt (MSI) support. Will send Intel-defined “End of
Interrupt” broadcast message when initiated by the processor.
System Management Interrupt (SMI), SCI, and SERR error indication
Static lane numbering reversal support
Supports DMI2 virtual channels VC0, VC1, VCm, and VCp
1.2.4 Intel® QuickPath Interconnect (Intel® QPI)
Compliant with Intel QuickPath Interconnect v1.1 standard packet formats
Implements two full width Intel QPI ports
Full width port includes 20 data lanes and 1 clock lane
64 byte cache-lines
Isochronous access support for Quality of Service (QoS), native 1 and 2 socket
platforms - Intel® Xeon® processor E5-1600 and E5-2600 product families only
Figure 1-3. PCI Express* Lane Partitioning and Direct Media Interface Gen 2 (DMI2)
Transaction
Link
Physical
0…3
X4
DMI
Port 0
DMI / PCIe
4…7
X4
Port 1b
Transaction
Link
Physical
0…3
X4
Port 1a
Port 1
(IOU2)
PCIe
X8
Port 1a
8…11
Transaction
Link
Physical
0…3
Port 2
(IOU0)
PCIe
X4
Port 2b
X4
Port 2a
X8
Port 2a
X4
Port 2d
X4
Port 2c
X8
Port 2c
X16
Port 2a
12..154…7 8…11
Transaction
Link
Physical
0…3
Port 3
(IOU1)
PCIe
X4
Port 3b
X4
Port 3a
X8
Port 3a
X4
Port 3d
X4
Port 3c
X8
Port 3c
X16
Port 3a
12..154…7