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B-18 October 22, 1999 SP Switch Router Adapter Guide - 1.4 Update 2
Log Messages
Message descriptions
“TX-CPU TBIC Init msg received from RX-CPU.”
LOG_FILE: /var/log/gr.console
SOURCE_FILE: tx/tbsi_ipc.c
SCOPE: CARD
CONTEXT: RUNNING
SEVERITY: INFO
DESCRIPTION: This message is logged when the TX-CPU receives a TBIC Init message
from the TX-CPU. The TX-CPU initializes the Transmit TBIC getting it ready for
transmitting data.
“TX: Port is connected, stat=0x%x.”
LOG_FILE: /var/log/gr.console
SOURCE_FILE: tx/tbsi_tc.c
SCOPE: CARD
CONTEXT: RUNNING
SEVERITY: INFO
DESCRIPTION: This message is logged when the Transmit TBIC’s Send port is
connected with the switch chip receive port.
“TX-PROR: start_node: %d, end_node: %d, # entries: %d.”
LOG_FILE: /var/log/gr.console
SOURCE_FILE: tx/tbsi_svc.c
SCOPE: CARD
CONTEXT: RUNNING
SEVERITY: INFO
DESCRIPTION: This message is logged when a Processor Routes service message is
processed.
“TX: pseudo STI clock is valid.”
LOG_FILE: /var/log/gr.console
SOURCE_FILE: tx/tbsi_tc.c
SCOPE: CARD
CONTEXT: RUNNING
SEVERITY: INFO
DESCRIPTION: This message is logged when the Transmit TBIC STI clock becomes
valid. The term “pseudo” is used to remind (us) that the STI is not from the interface, but
from the Receive TBIC.
“TX: Setting the TC in operational mode, stat= 0x%x.”
“TX clearing interrupts, i0=0x%x, i1=0x%x.”
LOG_FILE: /var/log/gr.console
SOURCE_FILE: tx/tbsi_tc.c
SCOPE: CARD
CONTEXT: RUNNING
SEVERITY: INFO
DESCRIPTION: This message is logged when the TX-CPU is ready to go to operational
state. That is, the card will be able to send data to the TBIC.