© National Instruments Corporation 11-1 NI 6238/6239 User Manual
11
Bus Interface
The bus interface circuitry of NI 6238/6239 devices efficiently moves data
between host memory and the measurement and acquisition circuits.
NI 6238/6239 devices are available for the following platforms.
•PCI
•PXI
NI 6238/6239 devices are jumperless for complete plug-and-play
operation. The operating system automatically assigns the base address,
interrupt levels, and other resources.
NI 6238/6239 devices incorporate PCI-MITE technology to implement a
high-performance PCI interface.
DMA Controllers
NI 6238/6239 devices have four fully-independent DMA controllers for
high-performance transfers of data blocks. One DMA controller is
available for each measurement and acquisition block.
• Analog input
• Analog output
• Counter 0
• Counter 1
Each DMA controller channel contains a FIFO and independent processes
for filling and emptying the FIFO. This allows the buses involved in the
transfer to operate independently for maximum performance. Data is
transferred simultaneously between the ports. The DMA controller
supports burst transfers to and from the FIFO.
Each DMA controller acts as a PCI Master device. The DMA controllers
support scatter-gather operations to and from host memory. Memory
buffers may be used in linear or circular fashion.