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IMPORTANT
Notes on EMEM Dialog:
Observe the following when setting up EMEM dialog of the emulator debugger.
(1) Debug Monitor Bank Address
• When "F0" is specified, 64 KB of area starting from F00000h are allocated for use by the debug
monitor.
• The 64 KB allocated to the debug monitor cannot be used.
• The below areas cannot be set for the debug monitor.
(1) MCU internal resources (RAM/SFR area)
(2) DRAM area or multiplex area
(3) Interrupt vector area
• It is not possible to view or set the content of the specified area. Even on the dump window or
in the reverse assemble area of the program/source windows, the content of this area is not
displayed correctly though it can be displayed.
(2) Processor Mode
• Set the target MCU to the processor mode.
• To set the single-chip mode and memory expansion mode, the CNVSS pin used with MCU
status must be "L". MCU status indicates pin level of the target system.
•To set the microprocessor mode, the CNVSS pin used with MCU status must be "H".
• To set the memory expansion mode and microprocessor mode, the RDY* and HOLD* pins used
with MCU status must be "H".
(3) Emulation Memory Allocation
• The 1.5MB memory mounted in the product can be allocated out.
•When the single chip mode and memory expansion mode are set by specifying the processor mode,
emulation memory is automatically allocated to the ROM area. Therefore, it is not necessary to
deliberately specify emulation memory as expansion area in order to allocated ROM area.
• Except for the SFR, RAM, ROM and internally reserved areas, all areas other than the set area
are externally accessible.
• MCU internal resources are automatically selected as SFR and RAM areas regardless of
settings.
• Even when "00" is specified as the expansion area, internally reserved areas (006400h -
007FFFh) cannot be used.
• Be careful that the specified areas do not overlap one another.
• Set memory allocation so that the total of the 4 length values does not exceed the emulation
memory size (1.5 MB).
•Do not set unusable areas for memory allocation.
• Emulation pod memory is automatically selected as reset vector area regardless of settings.
Note on S/W Break:
• S/W breaks generate break interruptions by forcibly inserting a BRK instruction "08h" instead of
a instruction code. Therefore, when referencing the result of a trace in bus mode, "08h" is displayed
for the instruction fetch address where a S/W break is set.