Filter
Top Products
10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
SMSC LAN91C111 REV C 107 Revision 1.91 (08-18-08)
DATASHEET
CAPACITANCE T
A
= 25°C; fc = 1MHz; V
CC
= 3.3V
CAPACITIVE LOAD ON OUTPUTS
I/O24 Type Buffer
Low Output Level
High Output Level
Output Leakage
V
OL
V
OH
I
OL
2.4
-10
0.4
+10
V
V
µA
I
OL
= 35 mA
I
OH
= -15 mA
V
IN
= 0 to V
CC
I/OD Type Buffer
Low Output Level
High Output Level
Output Leakage
V
OL
V
OH
I
OL
2.4
-10
0.4
+10
V
V
µA
I
OL
= 4 mA
na
V
IN
= 0 to V
CC
Supply Current Active
I
CC
100 140 mA
Dynamic Current
(Assuming internal PHY is
used)
Powerdown Supply Current I
PDN
15
38 mA Internal PHY in
Powerdown mode
14 36 mA Internal MAC+PHY in
Powerdown mode
LIMITS
PARAMETER SYMBOL MIN TYP MAX UNIT TEST CONDITION
Clock Input Capacitance C
IN
20 pF All pins except pin
under test tied to
AC ground
Input Capacitance C
IN
10 pF
Output Capacitance C
OUT
20 pF
ARDY, D0-D31 (non VLBUS) 45 pF
D0-D31 in VLBUS 45 pF
All other outputs 45 pF
PARAMETER SYMBOL MIN TYP MAX UNITS COMMENTS