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10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
SMSC LAN91C111 REV C 117 Revision 1.91 (08-18-08)
DATASHEET
PARAMETER MIN TYP MAX UNITS
t8 A1-A15, AEN, nBE[3:0] Setup to nADS Rising 8 ns
t9 A1-A15, AEN, nBE[3:0] Hold After nADS Rising 5 ns
t10 nCYCLE Setup to LCLK Rising 5 ns
t11 nCYCLE Hold after LCLK Rising (Non-Burst Mode) 3 ns
t16 W/nR Setup to nCYCLE Active 0 ns
t20 Data Hold from LCLK Rising (Read) 4 ns
t21 nSRDY Delay from LCLK Rising 7 ns
t23 nRDYRTN Setup to LCLK Rising 3 ns
t24 nRDYRTN Hold after LCLK Rising 3 ns
Figure 14.10 MII Timing
PARAMETER MIN TYP MAX UNITS
t27 TXD0-TXD3, TXEN100 Delay from TX25 Rising 0 15 ns
t28 RXD0-RXD3, RX_DV, RX_ER Setup to RX25 Rising 10 ns
t29 RXD0-RXD3, RX_DV, RX_ER Hold After RX25 Rising 10 ns
t28
t28
t28
t27
t27
t29
t29
TXD0-TXD3
TXEN100
RXD0-RXD3
RX25
RX_DV
RX_ER