Texas Instruments TMS470R1x Barcode Reader User Manual


 
Troubleshooting in the Protected-Mode Environment
A-4
PMINFO provides the information shown in Table A–1.
Table A–1. PMINFO Fields
Measurement Purpose
CPU performance Shows the CPU processor equivalent and the speed of the CPU (in MHz)
According to BIOS Shows the configured memory in DOS and extended memory as provided by the
BIOS (interrupts 12h and 15h, function 88h)
SETUP Shows the configuration obtained directly from the CMOS RAM as set by the com-
puter’s setup program. It is displayed only if the numbers are different from those
in the BIOS line. They are different if the BIOS has reserved memory for itself or
if another program has allocated memory and is intercepting the BIOS configura-
tion requests to report less memory available than is physically configured.
DOS/16M programs If displayed, shows the low and high addresses available to
DOS/4GW in
extended memory
Transfer rates PMINFO tries to determine the memory architecture. Some architectures perform
well under some circumstances and poorly under others; PMINFO shows the best
and worst cases. The architectures detected are cache, interleaved, page-mode
(or static column), and direct.
Measurements are made by using 32-bit accesses and are reported as the num-
ber of megabytes per second that can be transferred. The number of wait states
is reported in parentheses. The wait states can be a fractional number, like 0.5,
if there is a wait state on writes but not on reads. Memory bandwidth (that is, how
fast the CPU can access memory) accounts for 60% to 70% of the performance
for typical programs (those that are not heavily dependent on floating-point math).
Overall CPU and memory
performance
Shows a performance metric developed by Tenberry Software, Inc. (formerly
known as Rational Systems, Inc.), indicating the expected throughput for the com-
puter relative to a standard 8-MHz IBM PC/AT (disk accesses and floating-point
operations are both excluded).
Protected/real switch rate
Shows the speed with which the computer can switch between real and protected
modes, both as the maximum number of round-trip switches that can occur per
second, and as the time for a single round-trip switch, broken into the real-to-
protected (up) and protected-to-real (down) components.